The Sub-THz is defined by frequency ranges of 0.1 THz to 1 THz ( wavelength 300 micrometers to 3 millimeters).  

Building RF detectors in such a range of frequencies comes with immense challenges. The research aimed at the following goals:

1. A Sub-THz RFIC-based detector design along with the embedded antenna. 

2. Characterizing the 180nm CMOS technology process, for operations in the Sub-THz regime of operation. 

The following activities were performed during the project duration, and delivered by me

1. Literature review of the existing systems that utilize the CMOS or any other process technology. 

2. Design and simulation of a Sub-THz detector based on surface wave properties and amplitude mapping techniques.

The future aim is to develop the RFIC system with an on-chip antenna for building an integrated detector in the Sub-THz regime, that can support OOK modulation. The project is performed at ICASL, IIST